[NBLUG/talk] Bare metal question

[Andru Luvisi]

On Sun, 25 May 2003, Mitch Patenaude wrote:
[snip]
> The "not addressable" condition can be a little nebulous though.  Some
> RISC processors have large numbers of (truly) general purpose
> registers, and you can think about those as addressable, though they
> not addressed using the hardware address bus.   Also, you could also
> think about an L1 cache as a very large general purpose register.
[snip]

I'm not sure if this is what you are talking about or not, but on some
architectures the registers can be accessed by normal memory access
instructions when they use certain magic addresses.  For example, the
PDP-10 had some registers which could be accessed this way.

It so happens that the Linux Kernel is compiled by gcc, which was written
by Richard Stallman, who wrote the first version of Emacs as a set of TECO
macros on the MIT AI Lab's Incompatible Timesharing System running on the
PDP-10, which means that I'm still on topic!

Andru
-- 
Andru Luvisi, Programmer/Analyst

Quote Of The Moment:
  In the PDP-6 floating pointing is somewhat different.  Consult a wizard.
  		-- ITS PDP-10 Machine Language Manual